<urlset xmlns="http://www.sitemaps.org/schemas/sitemap/0.9" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.sitemaps.org/schemas/sitemap/0.9 http://www.sitemaps.org/schemas/sitemap/0.9/sitemap.xsd">
    <url>
        <loc>https://support.microchip.com/s/article/Are-the-charge-pumps-in-Smartfusion2-devices-always-on-1625098152766</loc>
        <lastmod>2021-07-10</lastmod>
        <priority>0.5</priority>
        <changefreq>daily</changefreq>    
    </url>
    <url>
        <loc>https://support.microchip.com/s/article/Pre-Synthesis-Simulation-Error-Due-to-Timing-ARC-Mismatches-in-Component-Package-Files-1625098202495</loc>
        <lastmod>2021-07-10</lastmod>
        <priority>0.5</priority>
        <changefreq>daily</changefreq>    
    </url>
    <url>
        <loc>https://support.microchip.com/s/article/ACTgen-implements-delay-parameter-incorrectly-1625098197850</loc>
        <lastmod>2021-07-10</lastmod>
        <priority>0.5</priority>
        <changefreq>daily</changefreq>    
    </url>
    <url>
        <loc>https://support.microchip.com/s/article/SmartFusion2-Igloo2-State-of-IOs-when-DEVRST-N-held-low-1625098151142</loc>
        <lastmod>2021-07-10</lastmod>
        <priority>0.5</priority>
        <changefreq>daily</changefreq>    
    </url>
    <url>
        <loc>https://support.microchip.com/s/article/Setting-the-data-rate-before-setting-the-clock-freq-does-not-work-1625098197871</loc>
        <lastmod>2021-07-10</lastmod>
        <priority>0.5</priority>
        <changefreq>daily</changefreq>    
    </url>
    <url>
        <loc>https://support.microchip.com/s/article/Exact-value-in-CCC-configuration-1625098152016</loc>
        <lastmod>2021-07-10</lastmod>
        <priority>0.5</priority>
        <changefreq>daily</changefreq>    
    </url>
    <url>
        <loc>https://support.microchip.com/s/article/Are-there-any-recommendations-to-detect-early-infant-mortality-failures-for-flash-FPGAs-1625098139418</loc>
        <lastmod>2021-07-10</lastmod>
        <priority>0.5</priority>
        <changefreq>daily</changefreq>    
    </url>
    <url>
        <loc>https://support.microchip.com/s/article/Error-during-Place-and-Route-with-Libero-v11-8-1625098149536</loc>
        <lastmod>2021-07-10</lastmod>
        <priority>0.5</priority>
        <changefreq>daily</changefreq>    
    </url>
    <url>
        <loc>https://support.microchip.com/s/article/Smartfusion2-IGLOO2-What-defines-the-SERDES-data-rate-speed-1625098157616</loc>
        <lastmod>2021-07-10</lastmod>
        <priority>0.5</priority>
        <changefreq>daily</changefreq>    
    </url>
    <url>
        <loc>https://support.microchip.com/s/article/Does-Microsemi-have-PCIe-drivers-Windows-and-Linux-available-for-SmartFusion2-Igloo2-and-RTG4-1625098147843</loc>
        <lastmod>2021-07-10</lastmod>
        <priority>0.5</priority>
        <changefreq>daily</changefreq>    
    </url>
    <url>
        <loc>https://support.microchip.com/s/article/ePD-and-Libero-ViewDraw-co-installation-licensing-issues-1625098197540</loc>
        <lastmod>2021-07-10</lastmod>
        <priority>0.5</priority>
        <changefreq>daily</changefreq>    
    </url>
    <url>
        <loc>https://support.microchip.com/s/article/Does-Microsemi-Edition-of-Modelsim-tool-Modelsim-ME-and-Modelsim-ME-Pro-support-FLI-Foreign-Language-Interface-1625098143013</loc>
        <lastmod>2021-07-10</lastmod>
        <priority>0.5</priority>
        <changefreq>daily</changefreq>    
    </url>
    <url>
        <loc>https://support.microchip.com/s/article/Smartfusion2-Can-we-Power-off-Bank-1-of-M2S050-FGG896I-1625098158317</loc>
        <lastmod>2021-07-10</lastmod>
        <priority>0.5</priority>
        <changefreq>daily</changefreq>    
    </url>
    <url>
        <loc>https://support.microchip.com/s/article/Issues-in-Incremental-router-for-AX-and-RTAX-S-1625098195283</loc>
        <lastmod>2021-07-10</lastmod>
        <priority>0.5</priority>
        <changefreq>daily</changefreq>    
    </url>
    <url>
        <loc>https://support.microchip.com/s/article/AX-Adder-Subtractor-produces-incorrect-simulation-result-during-VHDL-simulation-1625098195911</loc>
        <lastmod>2021-07-10</lastmod>
        <priority>0.5</priority>
        <changefreq>daily</changefreq>    
    </url>
    <url>
        <loc>https://support.microchip.com/s/article/Can-I-use-Varef-2-5V-for-ADC-in-SmartFusion-devices-1625098143680</loc>
        <lastmod>2021-07-10</lastmod>
        <priority>0.5</priority>
        <changefreq>daily</changefreq>    
    </url>
    <url>
        <loc>https://support.microchip.com/s/article/ViewDraw-cannot-be-started-if-there-is-an-invalid-license-server-in-LM-LICENSE-FILE-1625098196390</loc>
        <lastmod>2021-07-10</lastmod>
        <priority>0.5</priority>
        <changefreq>daily</changefreq>    
    </url>
    <url>
        <loc>https://support.microchip.com/s/article/ViewDraw-for-Actel-Schematic-Design-Rules-1625098197854</loc>
        <lastmod>2021-07-10</lastmod>
        <priority>0.5</priority>
        <changefreq>daily</changefreq>    
    </url>
    <url>
        <loc>https://support.microchip.com/s/article/Fan-In-Nets-to-RAM-Blocks-in-ChipPlanner-Are-Not-Displayed-1625098198400</loc>
        <lastmod>2021-07-10</lastmod>
        <priority>0.5</priority>
        <changefreq>daily</changefreq>    
    </url>
    <url>
        <loc>https://support.microchip.com/s/article/ProASIC-and-ProASICPLUS-Asynchronous-Read-and-Asynchronous-Write-to-the-Same-Address-1625098198927</loc>
        <lastmod>2021-07-10</lastmod>
        <priority>0.5</priority>
        <changefreq>daily</changefreq>    
    </url>
    <url>
        <loc>https://support.microchip.com/s/article/FCS325-package-don-t-have-SC-SPI-pins-FLASH-GOLDEN-N-pin-1625098158310</loc>
        <lastmod>2021-07-10</lastmod>
        <priority>0.5</priority>
        <changefreq>daily</changefreq>    
    </url>
    <url>
        <loc>https://support.microchip.com/s/article/Last-placement-gcf-may-not-match-adb-data-after-multi-pass-1625098194829</loc>
        <lastmod>2021-07-10</lastmod>
        <priority>0.5</priority>
        <changefreq>daily</changefreq>    
    </url>
    <url>
        <loc>https://support.microchip.com/s/article/Smartfusion2-IGLOO2-What-DDR-memory-devices-can-interface-to-the-FPGA-controller-1625098148602</loc>
        <lastmod>2021-07-10</lastmod>
        <priority>0.5</priority>
        <changefreq>daily</changefreq>    
    </url>
    <url>
        <loc>https://support.microchip.com/s/article/FIFO-Controller-issue-1625098197532</loc>
        <lastmod>2021-07-10</lastmod>
        <priority>0.5</priority>
        <changefreq>daily</changefreq>    
    </url>
    <url>
        <loc>https://support.microchip.com/s/article/Can-I-use-SPI-Slave-port-of-PolarFire-devices-for-data-communication-1625098143010</loc>
        <lastmod>2021-07-10</lastmod>
        <priority>0.5</priority>
        <changefreq>daily</changefreq>    
    </url>
    <url>
        <loc>https://support.microchip.com/s/article/Electrical-specs-Schmitt-trigger-characteristics-of-DEVRST-N-in-RTG4-devices-1625098139899</loc>
        <lastmod>2021-07-10</lastmod>
        <priority>0.5</priority>
        <changefreq>daily</changefreq>    
    </url>
    <url>
        <loc>https://support.microchip.com/s/article/Can-we-debug-CoreMP7-Target-based-applications-with-Softconsole-3-4-1625098158315</loc>
        <lastmod>2021-07-10</lastmod>
        <priority>0.5</priority>
        <changefreq>daily</changefreq>    
    </url>
    <url>
        <loc>https://support.microchip.com/s/article/The-dont-optimize-or-dont-touch-GCF-Constraints-Are-Not-Recognized-After-Layout-1625098194356</loc>
        <lastmod>2021-07-10</lastmod>
        <priority>0.5</priority>
        <changefreq>daily</changefreq>    
    </url>
    <url>
        <loc>https://support.microchip.com/s/article/Multi-tile-core-cells-and-spine-constraints-1625098195909</loc>
        <lastmod>2021-07-10</lastmod>
        <priority>0.5</priority>
        <changefreq>daily</changefreq>    
    </url>
    <url>
        <loc>https://support.microchip.com/s/article/Simulation-Error---Cannot-find-presynth-testbench-1625098202476</loc>
        <lastmod>2021-07-10</lastmod>
        <priority>0.5</priority>
        <changefreq>daily</changefreq>    
    </url>
    <url>
        <loc>https://support.microchip.com/s/article/RTG4-flip-chip-package-What-is-the-solder-bumps-material-composition-1625098139891</loc>
        <lastmod>2021-07-10</lastmod>
        <priority>0.5</priority>
        <changefreq>daily</changefreq>    
    </url>
    <url>
        <loc>https://support.microchip.com/s/article/What-is-Discrete-Clocking-option-which-is-available-in-FlashPro-Software-1625098138912</loc>
        <lastmod>2021-07-10</lastmod>
        <priority>0.5</priority>
        <changefreq>daily</changefreq>    
    </url>
    <url>
        <loc>https://support.microchip.com/s/article/Cannot-Switch-Clock-Inputs-To-Different-Clock-Pins-In-PinEdit-1625098202485</loc>
        <lastmod>2021-07-10</lastmod>
        <priority>0.5</priority>
        <changefreq>daily</changefreq>    
    </url>
    <url>
        <loc>https://support.microchip.com/s/article/Vref-Pin-Assignment-for-Axcelerator-Devices-Causes-Assertion-Failed-1625098198933</loc>
        <lastmod>2021-07-10</lastmod>
        <priority>0.5</priority>
        <changefreq>daily</changefreq>    
    </url>
    <url>
        <loc>https://support.microchip.com/s/article/Clock-skew-calculation-incorrect-when-the-potential-clock-goes-through-combinatorial-logic-1625098197885</loc>
        <lastmod>2021-07-10</lastmod>
        <priority>0.5</priority>
        <changefreq>daily</changefreq>    
    </url>
    <url>
        <loc>https://support.microchip.com/s/article/Program-Action-fails-when-the-device-is-already-programmed-with-the-design-generated-by-enabling-Suspend-mode-1625098146490</loc>
        <lastmod>2021-07-10</lastmod>
        <priority>0.5</priority>
        <changefreq>daily</changefreq>    
    </url>
    <url>
        <loc>https://support.microchip.com/s/article/What-is-the-glue-material-used-to-attach-the-lid-of-CG1152-package-1625098149867</loc>
        <lastmod>2021-07-10</lastmod>
        <priority>0.5</priority>
        <changefreq>daily</changefreq>    
    </url>
    <url>
        <loc>https://support.microchip.com/s/article/pin-unassign-all-in-script-fails-if-no-ADB-is-present-1625098202896</loc>
        <lastmod>2021-07-10</lastmod>
        <priority>0.5</priority>
        <changefreq>daily</changefreq>    
    </url>
    <url>
        <loc>https://support.microchip.com/s/article/ACTgen-generated-the-wrong-netlist-for-Pipelined-Barrel-Shifter-1625098194815</loc>
        <lastmod>2021-07-10</lastmod>
        <priority>0.5</priority>
        <changefreq>daily</changefreq>    
    </url>
    <url>
        <loc>https://support.microchip.com/s/article/FineICC-test-failure-in-Silicon-Sculptor-II-1625098202032</loc>
        <lastmod>2021-07-10</lastmod>
        <priority>0.5</priority>
        <changefreq>daily</changefreq>    
    </url>
    <url>
        <loc>https://support.microchip.com/s/article/Can-I-use-different-resistor-and-capacitor-in-the-PLL-filter-1625098137044</loc>
        <lastmod>2021-07-10</lastmod>
        <priority>0.5</priority>
        <changefreq>daily</changefreq>    
    </url>
    <url>
        <loc>https://support.microchip.com/s/article/What-is-the-I-O-state-of-an-un-programmed-blank-AX-RTAXS-device-1625098138870</loc>
        <lastmod>2021-07-10</lastmod>
        <priority>0.5</priority>
        <changefreq>daily</changefreq>    
    </url>
    <url>
        <loc>https://support.microchip.com/s/article/Batch-Mode-support-for-FlashPro-1625098151139</loc>
        <lastmod>2021-07-10</lastmod>
        <priority>0.5</priority>
        <changefreq>daily</changefreq>    
    </url>
    <url>
        <loc>https://support.microchip.com/s/article/Cannot-Use-a-btim-File-That-is-Created-in-a-Different-State-1625098197891</loc>
        <lastmod>2021-07-10</lastmod>
        <priority>0.5</priority>
        <changefreq>daily</changefreq>    
    </url>
    <url>
        <loc>https://support.microchip.com/s/article/Linux-License-Files-are-Missing-in-Designer-v5-2-Installation-1625098195898</loc>
        <lastmod>2021-07-10</lastmod>
        <priority>0.5</priority>
        <changefreq>daily</changefreq>    
    </url>
    <url>
        <loc>https://support.microchip.com/s/article/Synplify-Inferring-CLKINT-In-Front-Of-Special-CLKBUFs-1625098196964</loc>
        <lastmod>2021-07-10</lastmod>
        <priority>0.5</priority>
        <changefreq>daily</changefreq>    
    </url>
    <url>
        <loc>https://support.microchip.com/s/article/Smartfusion2-IGLOO2-Understanding-PCIe-AHB-master-read-transactions-1625098154472</loc>
        <lastmod>2021-07-10</lastmod>
        <priority>0.5</priority>
        <changefreq>daily</changefreq>    
    </url>
    <url>
        <loc>https://support.microchip.com/s/article/Synplify-generates-a-netlist-that-exceeds-the-maximum-fanout-of-device-causing-netlist-to-fail-compile-1625098202491</loc>
        <lastmod>2021-07-10</lastmod>
        <priority>0.5</priority>
        <changefreq>daily</changefreq>    
    </url>
    <url>
        <loc>https://support.microchip.com/s/article/Synplify-erroneously-inserting-CLKINT-after-a-HCLKBUF-macro-causing-Designer-to-fail-compile-1625098198374</loc>
        <lastmod>2021-07-10</lastmod>
        <priority>0.5</priority>
        <changefreq>daily</changefreq>    
    </url>
    <url>
        <loc>https://support.microchip.com/s/article/Which-tool-generates-the-hex-file-in-SoftConsole-debug-configuration-1625098147284</loc>
        <lastmod>2021-07-10</lastmod>
        <priority>0.5</priority>
        <changefreq>daily</changefreq>    
    </url> 
</urlset>