<urlset xmlns="http://www.sitemaps.org/schemas/sitemap/0.9" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.sitemaps.org/schemas/sitemap/0.9 http://www.sitemaps.org/schemas/sitemap/0.9/sitemap.xsd">
    <url>
        <loc>https://support.microchip.com/s/article/Why-do-I-get-the-error-Incorrect-Checksum-when-I-select-Actel-chksum-before-programming-on-the-Silicon-Sculptor-1625098132338</loc>
        <lastmod>2021-07-10</lastmod>
        <priority>0.5</priority>
        <changefreq>daily</changefreq>    
    </url>
    <url>
        <loc>https://support.microchip.com/s/article/What-is-the-I-Os-state-of-the-ProASIC-and-ProASIC-PLUS-devices-when-the-customer-received-the-new-devices-1625098131083</loc>
        <lastmod>2021-07-10</lastmod>
        <priority>0.5</priority>
        <changefreq>daily</changefreq>    
    </url>
    <url>
        <loc>https://support.microchip.com/s/article/How-to-Create-a-Project-Library-in-Viewlogic-s-SpeedWave-1625098200730</loc>
        <lastmod>2021-07-10</lastmod>
        <priority>0.5</priority>
        <changefreq>daily</changefreq>    
    </url>
    <url>
        <loc>https://support.microchip.com/s/article/Access-Actel-Libraries-For-Synthesis-with-Synplify-1625098202892</loc>
        <lastmod>2021-07-10</lastmod>
        <priority>0.5</priority>
        <changefreq>daily</changefreq>    
    </url>
    <url>
        <loc>https://support.microchip.com/s/article/Can-I-change-the-value-of-the-Silicon-Signature-in-the-afm-file-1625098132340</loc>
        <lastmod>2021-07-10</lastmod>
        <priority>0.5</priority>
        <changefreq>daily</changefreq>    
    </url>
    <url>
        <loc>https://support.microchip.com/s/article/What-is-PINCHECKSUM-in-Actel-s-afm-file-1625098196384</loc>
        <lastmod>2021-07-10</lastmod>
        <priority>0.5</priority>
        <changefreq>daily</changefreq>    
    </url>
    <url>
        <loc>https://support.microchip.com/s/article/Cross-Probing-Between-VeriBest-Design-Capture-and-VHDL-Simulator-1625098135760</loc>
        <lastmod>2021-07-10</lastmod>
        <priority>0.5</priority>
        <changefreq>daily</changefreq>    
    </url>
    <url>
        <loc>https://support.microchip.com/s/article/Reanalyzing-DesignWare-libraries-1625098136383</loc>
        <lastmod>2021-07-10</lastmod>
        <priority>0.5</priority>
        <changefreq>daily</changefreq>    
    </url>
    <url>
        <loc>https://support.microchip.com/s/article/Libero-v11-9-SP3-does-not-compute-the-worst-slack-for-DDR-input-when-using-positive-edge-of-clock-1625098146460</loc>
        <lastmod>2021-07-10</lastmod>
        <priority>0.5</priority>
        <changefreq>daily</changefreq>    
    </url>
    <url>
        <loc>https://support.microchip.com/s/article/Default-Settings-for-Unused-I-Os-and-Clocks-1625098133508</loc>
        <lastmod>2021-07-10</lastmod>
        <priority>0.5</priority>
        <changefreq>daily</changefreq>    
    </url>
    <url>
        <loc>https://support.microchip.com/s/article/Why-do-I-get-the-following-error-from-ViewDraw-in-the-Libero-environment-Error-Must-specify-primary-directory-1625098199799</loc>
        <lastmod>2021-07-10</lastmod>
        <priority>0.5</priority>
        <changefreq>daily</changefreq>    
    </url>
    <url>
        <loc>https://support.microchip.com/s/article/How-can-I-configure-the-afm-file-to-program-the-security-fuse-automatically-in-Actel-devices-with-the-Silicon-Sculptor-software-1625098132878</loc>
        <lastmod>2021-07-10</lastmod>
        <priority>0.5</priority>
        <changefreq>daily</changefreq>    
    </url>
    <url>
        <loc>https://support.microchip.com/s/article/Libero-PolarFire-programming-limitation-of-some-variant-of-PolarFire-devices-1625098143065</loc>
        <lastmod>2021-07-10</lastmod>
        <priority>0.5</priority>
        <changefreq>daily</changefreq>    
    </url>
    <url>
        <loc>https://support.microchip.com/s/article/How-Can-I-define-a-BUS-in-Libero-s-Viewdraw-Schematic-Capture-Tool-1625098199803</loc>
        <lastmod>2021-07-10</lastmod>
        <priority>0.5</priority>
        <changefreq>daily</changefreq>    
    </url>
    <url>
        <loc>https://support.microchip.com/s/article/Libero-not-supported-on-file-system-greater-than-2TB-1625098146465</loc>
        <lastmod>2021-07-10</lastmod>
        <priority>0.5</priority>
        <changefreq>daily</changefreq>    
    </url>
    <url>
        <loc>https://support.microchip.com/s/article/How-can-I-determine-the-status-of-the-Security-Fuse-on-an-Actel-Antifuse-FPGA-1625098132359</loc>
        <lastmod>2021-07-10</lastmod>
        <priority>0.5</priority>
        <changefreq>daily</changefreq>    
    </url>
    <url>
        <loc>https://support.microchip.com/s/article/What-is-the-difference-between-Array-Security-Probe-and-Program-fuse-types-1625098132335</loc>
        <lastmod>2021-07-10</lastmod>
        <priority>0.5</priority>
        <changefreq>daily</changefreq>    
    </url>
    <url>
        <loc>https://support.microchip.com/s/article/Reseting-VeriBest-VHDL-Simulation-Start-Time-1625098134953</loc>
        <lastmod>2021-07-10</lastmod>
        <priority>0.5</priority>
        <changefreq>daily</changefreq>    
    </url>
    <url>
        <loc>https://support.microchip.com/s/article/How-to-Connect-JTAG-Pins-in-42MX-3200DX-1625098134514</loc>
        <lastmod>2021-07-10</lastmod>
        <priority>0.5</priority>
        <changefreq>daily</changefreq>    
    </url>
    <url>
        <loc>https://support.microchip.com/s/article/Do-Actel-devices-have-a-built-in-global-set-reset-pin-1625098198382</loc>
        <lastmod>2021-07-10</lastmod>
        <priority>0.5</priority>
        <changefreq>daily</changefreq>    
    </url>
    <url>
        <loc>https://support.microchip.com/s/article/Do-42MX-3200DX-devices-have-a-flexible-dedicated-JTAG-mode-1625098134516</loc>
        <lastmod>2021-07-10</lastmod>
        <priority>0.5</priority>
        <changefreq>daily</changefreq>    
    </url>
    <url>
        <loc>https://support.microchip.com/s/article/Unable-to-start-Viewdraw-from-Libero-1625098139387</loc>
        <lastmod>2021-07-10</lastmod>
        <priority>0.5</priority>
        <changefreq>daily</changefreq>    
    </url>
    <url>
        <loc>https://support.microchip.com/s/article/FlashPro4-5-letters-of-Volatility-1625098141587</loc>
        <lastmod>2021-07-10</lastmod>
        <priority>0.5</priority>
        <changefreq>daily</changefreq>    
    </url>
    <url>
        <loc>https://support.microchip.com/s/article/act-2-AFM-Files-Cannot-Be-Used-to-Program-1200XL-Devices-1625098134933</loc>
        <lastmod>2021-07-10</lastmod>
        <priority>0.5</priority>
        <changefreq>daily</changefreq>    
    </url>
    <url>
        <loc>https://support.microchip.com/s/article/How-to-Stop-Actel-s-Compiler-From-Combining-Macros-1625098199786</loc>
        <lastmod>2021-07-10</lastmod>
        <priority>0.5</priority>
        <changefreq>daily</changefreq>    
    </url>
    <url>
        <loc>https://support.microchip.com/s/article/How-do-I-Translate-Timing-Constraints-from-the-Synopsys-Format-into-the-Designer-Format-1625098133468</loc>
        <lastmod>2021-07-10</lastmod>
        <priority>0.5</priority>
        <changefreq>daily</changefreq>    
    </url>
    <url>
        <loc>https://support.microchip.com/s/article/Changing-the-Schematic-Border-in-VeriBest-Design-Capture-1625098135734</loc>
        <lastmod>2021-07-10</lastmod>
        <priority>0.5</priority>
        <changefreq>daily</changefreq>    
    </url>
    <url>
        <loc>https://support.microchip.com/s/article/Setting-the-Default-Schematic-Border-in-VeriBest-Design-Capture-1625098135738</loc>
        <lastmod>2021-07-10</lastmod>
        <priority>0.5</priority>
        <changefreq>daily</changefreq>    
    </url>
    <url>
        <loc>https://support.microchip.com/s/article/Windows-blocked-the-installation-of-digitally-Unsigned-Driver-actelsvc-sys-1625098146471</loc>
        <lastmod>2021-07-10</lastmod>
        <priority>0.5</priority>
        <changefreq>daily</changefreq>    
    </url>
    <url>
        <loc>https://support.microchip.com/s/article/How-do-I-use-a-generic-ProASICPLUS-BSDL-file-for-a-design-with-Schmitt-Trigger-Input-1625098131088</loc>
        <lastmod>2021-07-10</lastmod>
        <priority>0.5</priority>
        <changefreq>daily</changefreq>    
    </url>
    <url>
        <loc>https://support.microchip.com/s/article/SDC-syntax-checker-is-not-consistent-in-GUI-and-tcl-mode-while-analyzing-timing-scenarios-1625098138111</loc>
        <lastmod>2021-07-10</lastmod>
        <priority>0.5</priority>
        <changefreq>daily</changefreq>    
    </url>
    <url>
        <loc>https://support.microchip.com/s/article/Changing-The-Color-Scheme-In-VeriBest-Design-Capture-1625098134956</loc>
        <lastmod>2021-07-10</lastmod>
        <priority>0.5</priority>
        <changefreq>daily</changefreq>    
    </url>
    <url>
        <loc>https://support.microchip.com/s/article/Using-standalone-ePD-with-Actel-Libero-software-1625098136975</loc>
        <lastmod>2021-07-10</lastmod>
        <priority>0.5</priority>
        <changefreq>daily</changefreq>    
    </url>
    <url>
        <loc>https://support.microchip.com/s/article/Can-I-Program-an-Actel-FPGA-with-a-dio-file-using-Silicon-Sculptor-I-II-1625098132852</loc>
        <lastmod>2021-07-10</lastmod>
        <priority>0.5</priority>
        <changefreq>daily</changefreq>    
    </url>
    <url>
        <loc>https://support.microchip.com/s/article/Connecting-Cross-Page-Signals-in-VeriBest-Design-Capture-1625098135749</loc>
        <lastmod>2021-07-10</lastmod>
        <priority>0.5</priority>
        <changefreq>daily</changefreq>    
    </url>
    <url>
        <loc>https://support.microchip.com/s/article/How-can-I-set-the-Base-Time-Unit-and-Display-Time-Unit-in-Wave-Former-Lite-1625098134503</loc>
        <lastmod>2021-07-10</lastmod>
        <priority>0.5</priority>
        <changefreq>daily</changefreq>    
    </url>
    <url>
        <loc>https://support.microchip.com/s/article/Fatal-Error-during-back-annotated-simulation-with-Modelsim-ME-version-1625098146479</loc>
        <lastmod>2021-07-10</lastmod>
        <priority>0.5</priority>
        <changefreq>daily</changefreq>    
    </url>
    <url>
        <loc>https://support.microchip.com/s/article/Parameterized-HDL-Blocks-in-VeriBest-Design-Capture-1625098135741</loc>
        <lastmod>2021-07-10</lastmod>
        <priority>0.5</priority>
        <changefreq>daily</changefreq>    
    </url>
    <url>
        <loc>https://support.microchip.com/s/article/Scan-Chain-passes-while-DEVRST-N-is-asserted-1625098138875</loc>
        <lastmod>2021-07-10</lastmod>
        <priority>0.5</priority>
        <changefreq>daily</changefreq>    
    </url>
    <url>
        <loc>https://support.microchip.com/s/article/Adding-Actel-Properties-to-Mentor-Graphic-s-Design-Architect-1625098199774</loc>
        <lastmod>2021-07-10</lastmod>
        <priority>0.5</priority>
        <changefreq>daily</changefreq>    
    </url>
    <url>
        <loc>https://support.microchip.com/s/article/Fast-Power-Up-for-MX42-Devices-Manufacturer-Prior-to-April-1999-1625098134936</loc>
        <lastmod>2021-07-10</lastmod>
        <priority>0.5</priority>
        <changefreq>daily</changefreq>    
    </url>
    <url>
        <loc>https://support.microchip.com/s/article/How-to-Run-Self-Test-for-Silicon-Sculptor-with-WINDOWS-version-1625098132865</loc>
        <lastmod>2021-07-10</lastmod>
        <priority>0.5</priority>
        <changefreq>daily</changefreq>    
    </url>
    <url>
        <loc>https://support.microchip.com/s/article/FAQs-About-Actel-Device-Checksums-and-Silicon-Signatures-1625098132355</loc>
        <lastmod>2021-07-10</lastmod>
        <priority>0.5</priority>
        <changefreq>daily</changefreq>    
    </url>
    <url>
        <loc>https://support.microchip.com/s/article/How-to-Run-a-Full-System-Self-Test-on-the-Silicon-Sculptor-with-DOS-version-1625098132862</loc>
        <lastmod>2021-07-10</lastmod>
        <priority>0.5</priority>
        <changefreq>daily</changefreq>    
    </url>
    <url>
        <loc>https://support.microchip.com/s/article/how-to-rip-a-bus-and-label-nets-1625098137032</loc>
        <lastmod>2021-07-10</lastmod>
        <priority>0.5</priority>
        <changefreq>daily</changefreq>    
    </url>
    <url>
        <loc>https://support.microchip.com/s/article/How-Do-I-Use-a-Generic-ProASICPLUS-BSDL-file-for-a-design-with-Schmitt-Trigger-Input-1625098199412</loc>
        <lastmod>2021-07-10</lastmod>
        <priority>0.5</priority>
        <changefreq>daily</changefreq>    
    </url>
    <url>
        <loc>https://support.microchip.com/s/article/Checking-for-Pad-Insertions-on-Ports-with-Synopsys-1625098135723</loc>
        <lastmod>2021-07-10</lastmod>
        <priority>0.5</priority>
        <changefreq>daily</changefreq>    
    </url>
    <url>
        <loc>https://support.microchip.com/s/article/Wind-U-Error-when-trying-to-start-Actel-software-on-Solaris-or-Linux-1625098183857</loc>
        <lastmod>2021-07-10</lastmod>
        <priority>0.5</priority>
        <changefreq>daily</changefreq>    
    </url>
    <url>
        <loc>https://support.microchip.com/s/article/Signal-Integrity-failure-during-Scan-Chain-using-FlashPro-Lite-Programmer-1625098168169</loc>
        <lastmod>2021-07-10</lastmod>
        <priority>0.5</priority>
        <changefreq>daily</changefreq>    
    </url>
    <url>
        <loc>https://support.microchip.com/s/article/Error-during-Pre-synthesis-simulation-of-AC333-APB-Master-Fabric-design-1625098168578</loc>
        <lastmod>2021-07-10</lastmod>
        <priority>0.5</priority>
        <changefreq>daily</changefreq>    
    </url> 
</urlset>