<urlset xmlns="http://www.sitemaps.org/schemas/sitemap/0.9" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.sitemaps.org/schemas/sitemap/0.9 http://www.sitemaps.org/schemas/sitemap/0.9/sitemap.xsd">
    <url>
        <loc>https://support.microchip.com/s/article/Can-I-generate-a-fuse-file-from-a-programmed-Actel-device-1625098198942</loc>
        <lastmod>2021-07-10</lastmod>
        <priority>0.5</priority>
        <changefreq>daily</changefreq>    
    </url>
    <url>
        <loc>https://support.microchip.com/s/article/Can-I-Program-an-Actel-FPGA-with-a-dio-file-using-Silicon-Sculptor-I-II-1625098132852</loc>
        <lastmod>2021-07-10</lastmod>
        <priority>0.5</priority>
        <changefreq>daily</changefreq>    
    </url>
    <url>
        <loc>https://support.microchip.com/s/article/Can-I-retarget-to-a-compatible-device-with-just-an-AFM-file-1625098198938</loc>
        <lastmod>2021-07-10</lastmod>
        <priority>0.5</priority>
        <changefreq>daily</changefreq>    
    </url>
    <url>
        <loc>https://support.microchip.com/s/article/Can-I-use-1020A-files-to-program-a-1020B-device-1625098134512</loc>
        <lastmod>2021-07-10</lastmod>
        <priority>0.5</priority>
        <changefreq>daily</changefreq>    
    </url>
    <url>
        <loc>https://support.microchip.com/s/article/Can-I-use-a-full-version-of-ViewDraw-together-with-the-Actel-ACTgen-macro-builder-1625098201326</loc>
        <lastmod>2021-07-10</lastmod>
        <priority>0.5</priority>
        <changefreq>daily</changefreq>    
    </url>
    <url>
        <loc>https://support.microchip.com/s/article/Can-I-use-full-version-ModelSim-in-Libero-1625098200295</loc>
        <lastmod>2021-07-10</lastmod>
        <priority>0.5</priority>
        <changefreq>daily</changefreq>    
    </url>
    <url>
        <loc>https://support.microchip.com/s/article/Can-I-use-multiple-REMOVEs-when-using-BASIC-interactive-stimulus-for-OrCad-simulation-1625098201341</loc>
        <lastmod>2021-07-10</lastmod>
        <priority>0.5</priority>
        <changefreq>daily</changefreq>    
    </url>
    <url>
        <loc>https://support.microchip.com/s/article/Can-I-use-Silicon-Sculptor-adapter-modules-to-program-Actel-devices-with-other-BP-programmers-like-BP1400-and-BP2100-etc-1625098132867</loc>
        <lastmod>2021-07-10</lastmod>
        <priority>0.5</priority>
        <changefreq>daily</changefreq>    
    </url>
    <url>
        <loc>https://support.microchip.com/s/article/Changing-The-Color-Scheme-In-VeriBest-Design-Capture-1625098134956</loc>
        <lastmod>2021-07-10</lastmod>
        <priority>0.5</priority>
        <changefreq>daily</changefreq>    
    </url>
    <url>
        <loc>https://support.microchip.com/s/article/Changing-the-Schematic-Border-in-VeriBest-Design-Capture-1625098135734</loc>
        <lastmod>2021-07-10</lastmod>
        <priority>0.5</priority>
        <changefreq>daily</changefreq>    
    </url>
    <url>
        <loc>https://support.microchip.com/s/article/Checking-for-Pad-Insertions-on-Ports-with-Synopsys-1625098135723</loc>
        <lastmod>2021-07-10</lastmod>
        <priority>0.5</priority>
        <changefreq>daily</changefreq>    
    </url>
    <url>
        <loc>https://support.microchip.com/s/article/CMOS-Vs-TTL-I-O-standard-1625098199403</loc>
        <lastmod>2021-07-10</lastmod>
        <priority>0.5</priority>
        <changefreq>daily</changefreq>    
    </url>
    <url>
        <loc>https://support.microchip.com/s/article/Compatibility-of-AFM-Files-from-Different-Designer-Versions-1625098134924</loc>
        <lastmod>2021-07-10</lastmod>
        <priority>0.5</priority>
        <changefreq>daily</changefreq>    
    </url>
    <url>
        <loc>https://support.microchip.com/s/article/Compile-Errors-Connectivity-Codes-CMP001-CMP030-1625098133488</loc>
        <lastmod>2021-07-10</lastmod>
        <priority>0.5</priority>
        <changefreq>daily</changefreq>    
    </url>
    <url>
        <loc>https://support.microchip.com/s/article/Compile-Warnings-Codes-CMP201-CMP300-1625098133482</loc>
        <lastmod>2021-07-10</lastmod>
        <priority>0.5</priority>
        <changefreq>daily</changefreq>    
    </url>
    <url>
        <loc>https://support.microchip.com/s/article/Compiling-HDL-code-in-Modelsim-1625098199763</loc>
        <lastmod>2021-07-10</lastmod>
        <priority>0.5</priority>
        <changefreq>daily</changefreq>    
    </url>
    <url>
        <loc>https://support.microchip.com/s/article/Compiling-Verilog-Libraries-for-ModelSIM-1625098134492</loc>
        <lastmod>2021-07-10</lastmod>
        <priority>0.5</priority>
        <changefreq>daily</changefreq>    
    </url>
    <url>
        <loc>https://support.microchip.com/s/article/Conflicting-Pin-Information-Between-PinEditor-Assignments-and-Netlist-Attributes-1625098195313</loc>
        <lastmod>2021-07-10</lastmod>
        <priority>0.5</priority>
        <changefreq>daily</changefreq>    
    </url>
    <url>
        <loc>https://support.microchip.com/s/article/Connecting-Cross-Page-Signals-in-VeriBest-Design-Capture-1625098135749</loc>
        <lastmod>2021-07-10</lastmod>
        <priority>0.5</priority>
        <changefreq>daily</changefreq>    
    </url>
    <url>
        <loc>https://support.microchip.com/s/article/Considerations-When-Migrating-From-SX08-to-SX08A-1625098202021</loc>
        <lastmod>2021-07-10</lastmod>
        <priority>0.5</priority>
        <changefreq>daily</changefreq>    
    </url>
    <url>
        <loc>https://support.microchip.com/s/article/Creating-Block-Symbols-in-VeriBest-Design-Capture-1625098135763</loc>
        <lastmod>2021-07-10</lastmod>
        <priority>0.5</priority>
        <changefreq>daily</changefreq>    
    </url>
    <url>
        <loc>https://support.microchip.com/s/article/Creating-Your-Own-Schematic-Border-in-VeriBest-Design-Capture-1625098135732</loc>
        <lastmod>2021-07-10</lastmod>
        <priority>0.5</priority>
        <changefreq>daily</changefreq>    
    </url>
    <url>
        <loc>https://support.microchip.com/s/article/Cross-Probing-Between-VeriBest-Design-Capture-and-VHDL-Simulator-1625098135760</loc>
        <lastmod>2021-07-10</lastmod>
        <priority>0.5</priority>
        <changefreq>daily</changefreq>    
    </url>
    <url>
        <loc>https://support.microchip.com/s/article/CvdbConvert-Error-When-Converting-Designs-from-Designer-3-0-or-3-1-to-Designer-3-1-1-or-Later-1625098133460</loc>
        <lastmod>2021-07-10</lastmod>
        <priority>0.5</priority>
        <changefreq>daily</changefreq>    
    </url>
    <url>
        <loc>https://support.microchip.com/s/article/Default-Settings-for-Unused-I-Os-and-Clocks-1625098133508</loc>
        <lastmod>2021-07-10</lastmod>
        <priority>0.5</priority>
        <changefreq>daily</changefreq>    
    </url>
    <url>
        <loc>https://support.microchip.com/s/article/Design-states-invalidated-when-Speed-Grade-is-changed-1625098141562</loc>
        <lastmod>2021-07-10</lastmod>
        <priority>0.5</priority>
        <changefreq>daily</changefreq>    
    </url>
    <url>
        <loc>https://support.microchip.com/s/article/Do-42MX-3200DX-devices-have-a-flexible-dedicated-JTAG-mode-1625098134516</loc>
        <lastmod>2021-07-10</lastmod>
        <priority>0.5</priority>
        <changefreq>daily</changefreq>    
    </url>
    <url>
        <loc>https://support.microchip.com/s/article/Do-Actel-devices-have-a-built-in-global-set-reset-pin-1625098198382</loc>
        <lastmod>2021-07-10</lastmod>
        <priority>0.5</priority>
        <changefreq>daily</changefreq>    
    </url>
    <url>
        <loc>https://support.microchip.com/s/article/Does-Actel-Dry-Pack-Their-Devices-1625098196385</loc>
        <lastmod>2021-07-10</lastmod>
        <priority>0.5</priority>
        <changefreq>daily</changefreq>    
    </url>
    <url>
        <loc>https://support.microchip.com/s/article/Driving-3-3V-clock-signal-to-MSIOD-pins-of-RTG4-Dev-Kit-1625098145640</loc>
        <lastmod>2021-07-10</lastmod>
        <priority>0.5</priority>
        <changefreq>daily</changefreq>    
    </url>
    <url>
        <loc>https://support.microchip.com/s/article/Error-in-Designer-s-edn2mgc-Script-Causes-Incorrect-Mapping-for-40MX-Devices-1625098134519</loc>
        <lastmod>2021-07-10</lastmod>
        <priority>0.5</priority>
        <changefreq>daily</changefreq>    
    </url>
    <url>
        <loc>https://support.microchip.com/s/article/Error-When-Reading-an-EPD-ViewDraw-Generated-EDIF-Netlist-into-Designer-1625098134509</loc>
        <lastmod>2021-07-10</lastmod>
        <priority>0.5</priority>
        <changefreq>daily</changefreq>    
    </url>
    <url>
        <loc>https://support.microchip.com/s/article/Error-Cell-XX-hasNo-contents-and-isNot-defined-in-library-1625098201305</loc>
        <lastmod>2021-07-10</lastmod>
        <priority>0.5</priority>
        <changefreq>daily</changefreq>    
    </url>
    <url>
        <loc>https://support.microchip.com/s/article/Error-CMP031-Top-level-Port-is-not-attached-to-a-pad-1625098201334</loc>
        <lastmod>2021-07-10</lastmod>
        <priority>0.5</priority>
        <changefreq>daily</changefreq>    
    </url>
    <url>
        <loc>https://support.microchip.com/s/article/FAQs-About-Actel-Device-Checksums-and-Silicon-Signatures-1625098132355</loc>
        <lastmod>2021-07-10</lastmod>
        <priority>0.5</priority>
        <changefreq>daily</changefreq>    
    </url>
    <url>
        <loc>https://support.microchip.com/s/article/Fast-Power-Up-for-MX42-Devices-Manufacturer-Prior-to-April-1999-1625098134936</loc>
        <lastmod>2021-07-10</lastmod>
        <priority>0.5</priority>
        <changefreq>daily</changefreq>    
    </url>
    <url>
        <loc>https://support.microchip.com/s/article/Fatal-Error-during-back-annotated-simulation-with-Modelsim-ME-version-1625098146479</loc>
        <lastmod>2021-07-10</lastmod>
        <priority>0.5</priority>
        <changefreq>daily</changefreq>    
    </url>
    <url>
        <loc>https://support.microchip.com/s/article/FlashPro4-5-letters-of-Volatility-1625098141587</loc>
        <lastmod>2021-07-10</lastmod>
        <priority>0.5</priority>
        <changefreq>daily</changefreq>    
    </url>
    <url>
        <loc>https://support.microchip.com/s/article/Generating-a-Pin-Report-1625098196379</loc>
        <lastmod>2021-07-10</lastmod>
        <priority>0.5</priority>
        <changefreq>daily</changefreq>    
    </url>
    <url>
        <loc>https://support.microchip.com/s/article/Generating-an-Actel-specific-EDIF-Netlist-from-Synopsys-1625098136377</loc>
        <lastmod>2021-07-10</lastmod>
        <priority>0.5</priority>
        <changefreq>daily</changefreq>    
    </url>
    <url>
        <loc>https://support.microchip.com/s/article/Getting-Error-when-opening-Libero-Help-in-Linux-1625098145636</loc>
        <lastmod>2021-07-10</lastmod>
        <priority>0.5</priority>
        <changefreq>daily</changefreq>    
    </url>
    <url>
        <loc>https://support.microchip.com/s/article/Get-cells-in-set-preserve-command-fails-during-Place-and-Route-1625098143682</loc>
        <lastmod>2021-07-10</lastmod>
        <priority>0.5</priority>
        <changefreq>daily</changefreq>    
    </url>
    <url>
        <loc>https://support.microchip.com/s/article/Hierarchy-Connector-in-MIX-Schematic-HDL-Design-1625098200719</loc>
        <lastmod>2021-07-10</lastmod>
        <priority>0.5</priority>
        <changefreq>daily</changefreq>    
    </url>
    <url>
        <loc>https://support.microchip.com/s/article/How-can-I-configure-the-afm-file-to-program-the-security-fuse-automatically-in-Actel-devices-with-the-Silicon-Sculptor-software-1625098132878</loc>
        <lastmod>2021-07-10</lastmod>
        <priority>0.5</priority>
        <changefreq>daily</changefreq>    
    </url>
    <url>
        <loc>https://support.microchip.com/s/article/How-Can-I-define-a-BUS-in-Libero-s-Viewdraw-Schematic-Capture-Tool-1625098199803</loc>
        <lastmod>2021-07-10</lastmod>
        <priority>0.5</priority>
        <changefreq>daily</changefreq>    
    </url>
    <url>
        <loc>https://support.microchip.com/s/article/How-can-I-determine-the-status-of-the-Security-Fuse-on-an-Actel-Antifuse-FPGA-1625098132359</loc>
        <lastmod>2021-07-10</lastmod>
        <priority>0.5</priority>
        <changefreq>daily</changefreq>    
    </url>
    <url>
        <loc>https://support.microchip.com/s/article/How-can-I-disable-VITAL-glitch-generation-in-my-ModelSim-simulation-1625098198384</loc>
        <lastmod>2021-07-10</lastmod>
        <priority>0.5</priority>
        <changefreq>daily</changefreq>    
    </url>
    <url>
        <loc>https://support.microchip.com/s/article/How-can-I-set-the-Base-Time-Unit-and-Display-Time-Unit-in-Wave-Former-Lite-1625098134503</loc>
        <lastmod>2021-07-10</lastmod>
        <priority>0.5</priority>
        <changefreq>daily</changefreq>    
    </url>
    <url>
        <loc>https://support.microchip.com/s/article/How-Do-I-Add-I-O-Pins-To-Design-Architect-Schematics-1625098199772</loc>
        <lastmod>2021-07-10</lastmod>
        <priority>0.5</priority>
        <changefreq>daily</changefreq>    
    </url>
    <url>
        <loc>https://support.microchip.com/s/article/How-Do-I-Assign-Pins-to-My-Design-Within-the-Synopsys-Environment-1625098133472</loc>
        <lastmod>2021-07-10</lastmod>
        <priority>0.5</priority>
        <changefreq>daily</changefreq>    
    </url> 
</urlset>